libnx v4.9.0
Loading...
Searching...
No Matches
thread_context.h
Go to the documentation of this file.
1/**
2 * @file thread_context.h
3 * @brief AArch64 register dump format and related definitions.
4 * @author TuxSH
5 * @copyright libnx Authors
6 */
7
8#pragma once
9#include "../types.h"
10
11/// Armv8 CPU register.
12typedef union {
13 u64 x; ///< 64-bit AArch64 register view.
14 u32 w; ///< 32-bit AArch64 register view.
15 u32 r; ///< AArch32 register view.
17
18/// Armv8 NEON register.
19typedef union {
20 u128 v; ///< 128-bit vector view.
21 double d; ///< 64-bit double-precision view.
22 float s; ///< 32-bit single-precision view.
24
25/// Armv8 register group. @ref svcGetThreadContext3 uses @ref RegisterGroup_All.
26typedef enum {
27 RegisterGroup_CpuGprs = BIT(0), ///< General-purpose CPU registers (x0..x28 or r0..r10,r12).
28 RegisterGroup_CpuSprs = BIT(1), ///< Special-purpose CPU registers (fp, lr, sp, pc, PSTATE or cpsr, TPIDR_EL0).
29 RegisterGroup_FpuGprs = BIT(2), ///< General-purpose NEON registers.
30 RegisterGroup_FpuSprs = BIT(3), ///< Special-purpose NEON registers.
31
36
37/// This is for \ref ThreadExceptionDump error_desc.
38typedef enum {
39 ThreadExceptionDesc_InstructionAbort = 0x100, ///< Instruction abort
40 ThreadExceptionDesc_MisalignedPC = 0x102, ///< Misaligned PC
41 ThreadExceptionDesc_MisalignedSP = 0x103, ///< Misaligned SP
42 ThreadExceptionDesc_SError = 0x106, ///< SError [not in 1.0.0?]
43 ThreadExceptionDesc_BadSVC = 0x301, ///< Bad SVC
44 ThreadExceptionDesc_Trap = 0x104, ///< Uncategorized, CP15RTTrap, CP15RRTTrap, CP14RTTrap, CP14RRTTrap, IllegalState, SystemRegisterTrap
45 ThreadExceptionDesc_Other = 0x101, ///< None of the above, EC <= 0x34 and not a breakpoint
47
48/// Thread context structure (register dump)
49typedef struct {
50 CpuRegister cpu_gprs[29]; ///< GPRs 0..28. Note: also contains AArch32 SPRs.
51 u64 fp; ///< Frame pointer (x29) (AArch64). For AArch32, check r11.
52 u64 lr; ///< Link register (x30) (AArch64). For AArch32, check r14.
53 u64 sp; ///< Stack pointer (AArch64). For AArch32, check r13.
54 CpuRegister pc; ///< Program counter.
55 u32 psr; ///< PSTATE or cpsr.
56
57 FpuRegister fpu_gprs[32]; ///< 32 general-purpose NEON registers.
58 u32 fpcr; ///< Floating-point control register.
59 u32 fpsr; ///< Floating-point status register.
60
61 u64 tpidr; ///< EL0 Read/Write Software Thread ID Register.
63
64/// Thread exception dump structure.
65typedef struct {
66 u32 error_desc; ///< See \ref ThreadExceptionDesc.
67 u32 pad[3];
68
69 CpuRegister cpu_gprs[29]; ///< GPRs 0..28. Note: also contains AArch32 registers.
70 CpuRegister fp; ///< Frame pointer.
71 CpuRegister lr; ///< Link register.
72 CpuRegister sp; ///< Stack pointer.
73 CpuRegister pc; ///< Program counter (elr_el1).
74
75 u64 padding;
76
77 FpuRegister fpu_gprs[32]; ///< 32 general-purpose NEON registers.
78
79 u32 pstate; ///< pstate & 0xFF0FFE20
80 u32 afsr0;
81 u32 afsr1;
82 u32 esr;
83
84 CpuRegister far; ///< Fault Address Register.
86
87typedef struct {
88 u64 cpu_gprs[9]; ///< GPRs 0..8.
89 u64 lr;
90 u64 sp;
91 u64 elr_el1;
92 u32 pstate; ///< pstate & 0xFF0FFE20
93 u32 afsr0;
94 u32 afsr1;
95 u32 esr;
96 u64 far;
98
99typedef struct {
100 u32 cpu_gprs[8]; ///< GPRs 0..7.
101 u32 sp;
102 u32 lr;
103 u32 elr_el1;
104 u32 tpidr_el0; ///< tpidr_el0 = 1
105 u32 cpsr; ///< cpsr & 0xFF0FFE20
106 u32 afsr0;
107 u32 afsr1;
108 u32 esr;
109 u32 far;
111
112/**
113 * @brief Determines whether a thread context belong to an AArch64 process based on the PSR.
114 * @param[in] ctx Thread context to which PSTATE/cspr has been dumped to.
115 * @return true if and only if the thread context belongs to an AArch64 process.
116 */
117static inline bool threadContextIsAArch64(const ThreadContext *ctx)
118{
119 return (ctx->psr & 0x10) == 0;
120}
121
122/**
123 * @brief Determines whether a ThreadExceptionDump belongs to an AArch64 process based on the PSTATE.
124 * @param[in] ctx ThreadExceptionDump.
125 * @return true if and only if the ThreadExceptionDump belongs to an AArch64 process.
126 */
127static inline bool threadExceptionIsAArch64(const ThreadExceptionDump *ctx)
128{
129 return (ctx->pstate & 0x10) == 0;
130}
Thread context structure (register dump)
Definition thread_context.h:49
u32 fpcr
Floating-point control register.
Definition thread_context.h:58
u32 psr
PSTATE or cpsr.
Definition thread_context.h:55
CpuRegister pc
Program counter.
Definition thread_context.h:54
u32 fpsr
Floating-point status register.
Definition thread_context.h:59
u64 tpidr
EL0 Read/Write Software Thread ID Register.
Definition thread_context.h:61
u64 fp
Frame pointer (x29) (AArch64). For AArch32, check r11.
Definition thread_context.h:51
u64 sp
Stack pointer (AArch64). For AArch32, check r13.
Definition thread_context.h:53
u64 lr
Link register (x30) (AArch64). For AArch32, check r14.
Definition thread_context.h:52
Thread exception dump structure.
Definition thread_context.h:65
u32 error_desc
See ThreadExceptionDesc.
Definition thread_context.h:66
CpuRegister pc
Program counter (elr_el1).
Definition thread_context.h:73
u32 pstate
pstate & 0xFF0FFE20
Definition thread_context.h:79
CpuRegister lr
Link register.
Definition thread_context.h:71
CpuRegister fp
Frame pointer.
Definition thread_context.h:70
CpuRegister far
Fault Address Register.
Definition thread_context.h:84
CpuRegister sp
Stack pointer.
Definition thread_context.h:72
Definition thread_context.h:99
u32 tpidr_el0
tpidr_el0 = 1
Definition thread_context.h:104
u32 cpsr
cpsr & 0xFF0FFE20
Definition thread_context.h:105
Definition thread_context.h:87
u32 pstate
pstate & 0xFF0FFE20
Definition thread_context.h:92
RegisterGroup
Armv8 register group. svcGetThreadContext3 uses RegisterGroup_All.
Definition thread_context.h:26
@ RegisterGroup_CpuGprs
General-purpose CPU registers (x0..x28 or r0..r10,r12).
Definition thread_context.h:27
@ RegisterGroup_FpuSprs
Special-purpose NEON registers.
Definition thread_context.h:30
@ RegisterGroup_CpuAll
All CPU registers.
Definition thread_context.h:32
@ RegisterGroup_FpuAll
All NEON registers.
Definition thread_context.h:33
@ RegisterGroup_FpuGprs
General-purpose NEON registers.
Definition thread_context.h:29
@ RegisterGroup_All
All registers.
Definition thread_context.h:34
@ RegisterGroup_CpuSprs
Special-purpose CPU registers (fp, lr, sp, pc, PSTATE or cpsr, TPIDR_EL0).
Definition thread_context.h:28
ThreadExceptionDesc
This is for ThreadExceptionDump error_desc.
Definition thread_context.h:38
@ ThreadExceptionDesc_Trap
Uncategorized, CP15RTTrap, CP15RRTTrap, CP14RTTrap, CP14RRTTrap, IllegalState, SystemRegisterTrap.
Definition thread_context.h:44
@ ThreadExceptionDesc_MisalignedPC
Misaligned PC.
Definition thread_context.h:40
@ ThreadExceptionDesc_InstructionAbort
Instruction abort.
Definition thread_context.h:39
@ ThreadExceptionDesc_BadSVC
Bad SVC.
Definition thread_context.h:43
@ ThreadExceptionDesc_MisalignedSP
Misaligned SP.
Definition thread_context.h:41
@ ThreadExceptionDesc_SError
SError [not in 1.0.0?].
Definition thread_context.h:42
@ ThreadExceptionDesc_Other
None of the above, EC <= 0x34 and not a breakpoint.
Definition thread_context.h:45
static bool threadContextIsAArch64(const ThreadContext *ctx)
Determines whether a thread context belong to an AArch64 process based on the PSR.
Definition thread_context.h:117
static bool threadExceptionIsAArch64(const ThreadExceptionDump *ctx)
Determines whether a ThreadExceptionDump belongs to an AArch64 process based on the PSTATE.
Definition thread_context.h:127
#define BIT(n)
Creates a bitmask from a bit number.
Definition types.h:54
uint64_t u64
64-bit unsigned integer.
Definition types.h:22
__uint128_t u128
128-bit unsigned integer.
Definition types.h:23
uint32_t u32
32-bit unsigned integer.
Definition types.h:21
Armv8 CPU register.
Definition thread_context.h:12
u64 x
64-bit AArch64 register view.
Definition thread_context.h:13
u32 r
AArch32 register view.
Definition thread_context.h:15
u32 w
32-bit AArch64 register view.
Definition thread_context.h:14
Armv8 NEON register.
Definition thread_context.h:19
double d
64-bit double-precision view.
Definition thread_context.h:21
u128 v
128-bit vector view.
Definition thread_context.h:20
float s
32-bit single-precision view.
Definition thread_context.h:22