libnx  v4.2.0
Functions
cache.h File Reference

AArch64 cache operations. More...

#include "../types.h"

Go to the source code of this file.

Functions

void armDCacheFlush (void *addr, size_t size)
 Performs a data cache flush on the specified buffer. More...
 
void armDCacheClean (void *addr, size_t size)
 Performs a data cache clean on the specified buffer. More...
 
void armICacheInvalidate (void *addr, size_t size)
 Performs an instruction cache invalidation clean on the specified buffer. More...
 
void armDCacheZero (void *addr, size_t size)
 Performs a data cache zeroing operation on the specified buffer. More...
 

Detailed Description

AArch64 cache operations.

Author
plutoo

Function Documentation

◆ armDCacheClean()

void armDCacheClean ( void *  addr,
size_t  size 
)

Performs a data cache clean on the specified buffer.

Parameters
addrAddress of the buffer.
sizeSize of the buffer, in bytes.
Note
The start and end addresses of the buffer are forcibly rounded to cache line boundaries (read from CTR_EL0 system register).

◆ armDCacheFlush()

void armDCacheFlush ( void *  addr,
size_t  size 
)

Performs a data cache flush on the specified buffer.

Parameters
addrAddress of the buffer.
sizeSize of the buffer, in bytes.
Remarks
Cache flush is defined as Clean + Invalidate.
Note
The start and end addresses of the buffer are forcibly rounded to cache line boundaries (read from CTR_EL0 system register).

◆ armDCacheZero()

void armDCacheZero ( void *  addr,
size_t  size 
)

Performs a data cache zeroing operation on the specified buffer.

Parameters
addrAddress of the buffer.
sizeSize of the buffer, in bytes.
Note
The start and end addresses of the buffer are forcibly rounded to cache line boundaries (read from CTR_EL0 system register).

◆ armICacheInvalidate()

void armICacheInvalidate ( void *  addr,
size_t  size 
)

Performs an instruction cache invalidation clean on the specified buffer.

Parameters
addrAddress of the buffer.
sizeSize of the buffer, in bytes.
Note
The start and end addresses of the buffer are forcibly rounded to cache line boundaries (read from CTR_EL0 system register).